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Automotive MCU Chip Architect
Hop · Duesseldorf
Publicada em 25/10/2026
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We are looking for an experienced Automotive MCU Chip Architect to define the system and subsystem architecture of next-generation automotive microcontrollers. The role includes ownership of chip-level architecture concepts, subsystem partitioning, compute and memory architecture, interconnect strategy, safety and security integration, power/reset/clock concepts, and hardware/software interface definition. The successful candidate will work closely with product management, safety, security, design, verification, software, and implementation teams to ensure the MCU architecture meets demanding automotiverequirements for real-time performance, functional safety, cybersecurity, reliability, scalability, and cost efficiency.What you'll doKey Responsibilities
System Architecture Definition
Define the overall automotive MCU architecture from product, customer, and market requirements.
Translate use cases into chip-level requirements covering performance, safety, security, power, cost, andscalability.
Drive system partitioning across CPUs, memories, interconnects, peripherals, safety/security functions,debug, test, and power domains.
Own architecture trade-offs and document decision rationale for reuse across MCU families andderivatives.
Subsystem Architecture Ownership
Align subsystem concepts and interfaces across compute, memory, bus/interconnect, peripheral, safety,security, power/reset/clock, debug/trace, and DFT/test domains.
Ensure subsystem requirements are implementation-feasible and verifiable at RTL, subsystem, chip,silicon, and software levels.
Define hardware/software-visible architecture elements such as memory maps, register modelprinciples, interrupts, DMA, boot flow, and access-control concepts.
Cross-Functional Technical Leadership
Lead architecture reviews and resolve trade-offs between product management, system engineering,safety, security, design, verification, software, backend, test, and validation teams.
Provide technical guidance during
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