Senior FPGA Developer (SystemVerilog)

<div class="content-intro"><p><img src="https://i.imgur.com/XN94Hg4.png" alt="" width="900" style="max-width: 100%;"></p> <p> </p></div><p><strong><span data-contrast="none"><span data-ccp-parastyle="heading 2">The Role</span></span><span data-ccp-props="{"134245418":true,"134245529":true,"335559738":160,"335559739":80}"> </span></strong></p> <p><span data-contrast="auto">The Senior FPGA Developer will be a member of the core team building the Quantum Key Distribution system. The focus is end</span><span data-contrast="auto">‑</span><span data-contrast="auto">to</span><span data-contrast="auto">‑</span><span data-contrast="auto">end RTL ownership on AMD/Xilinx (Artix</span><span data-contrast="auto">‑</span><span data-contrast="auto">7, Kintex UltraScale): architect, implement, verify, and close timing on high</span><span data-contrast="auto">‑</span><span data-contrast="auto">rate interfaces and deterministic pipelines. The role also sets engineering discipline for FPGA development and mentors a junior engineer.</span><span data-ccp-props="{}"> </span></p> <p><span data-contrast="auto">The Senior FPGA Developer owns the FPGA architecture/codebase and collaborates closely with embedded/software to define clean contracts, ensure reliable bring</span><span data-contrast="auto">‑</span><span data-contrast="auto">up, and d